Workshop on ISTE STTP CMOS Mixed Signal and Radio Frequency VLSI Design

31st Jan, 2017

Two week workshop on ISTE STTP CMOS Mixed Signal and Radio Frequency VLSI Design held on 30th January to 04th February 2017 at cute Hall.The inauguration of the two week STTP was headed by the principal investigator (NMEICT) Prof.Rajadutta, Department of ECE, IIT Kharagpur, Westbengal on 30.01.2017, Monday. IIT Kharagpur and IIT Bombay are working together with Engineering Colleges of India to enhance the teaching skills of our faculty colleagues in core Engineering and Science subjects by conducting ISTE Short Term Training Programmes (STTPs) under Train Ten Thousand Teachers (T10KT) project using 353 established remote centers across India. Participating teachers attend live lectures at a remote center close to their own college, and also attend tutorial and lab sessions conducted in the same centers. The lecture transmission and live interaction takes place in distance mode using A-VIEW technology through Internet at the selected remote centers across the country.Since December 2009, a number of two-week ISTE STTPs were conducted on various Engineering subjects. We have reached out to more than 1,00,000 teachers and helped them to enhance their teaching skills in these subjects.

In his inaugural address he stressed that VLSI Design is an emerging field in India and has an excellent future. Many semiconductor industries are emerging in last 5 years in India and design, layout of VLSI chips is carried out with our technology. This course will help the teachers in updating the students with latest improvements in VLSI chip design and various issues in the designing process of VLSI chip.

The objective of the course is Design and implementation methodology of Analog front end for sensor interface: Instrumentation Amplifier (IA), chopper, Variable Gain Amplifier (VGA), Data converters: SAR & pipelined ADC, Digital VLSI: a) Static MOS gate circuits b) High-Speed CMOS Logic Design c) Transfer Gate and Dynamic Logic Designd) VLSI architectures for video processing,RF circuits: Introduction to RFIC design,Design and implementation of typical RF Tx-Rx sub-components:(a) Low Noise Amplifier (LNA) (b) Mixer c) Frequency synthesizer (d) Power amplifier (e) Lay out and chip level integration.

The vote of thanks was delivered by Dr.T.K.Battacharya, Professor, Department of ECE IIT Kharaagpur. He stressed the need of taking this training as it is a must for the teachers to know the concepts regarding RF and VLSI design which is the base for carrying out research in the VLSI domain. He thanked the MHRD, Government of India for having sponsored this STTP to train 10,000 teachers in India.